Number Representation and Computer Arithmetic PYQs for GATE CS

Solve 14+ Number Representation and Computer Arithmetic previous year questions for GATE CS with answers and detailed solutions. Free sample questions below.

Sign-Magnitude Representation

In Sign-Magnitude representation, the Most Significant Bit (MSB) is dedicated to the sign, while the remaining $n - 1$ bits represent the magnitude.

      1
      Sign Bit
    

      0
      1
      1
      Magnitude
    

Sign Bit: 0 for positive, 1 for negative.
Range: $- (2^{n - 1} - 1)$ to $+ (2^{n - 1} - 1)$
Zero: Has two representations (+0 and -0).

Example (4-bit):
+3 = 0011
-3 = 1011

1's Complement Representation

In 1's Complement representation, positive numbers are represented as in Sign-Magnitude. Negative numbers are obtained by inverting all bits (changing 0 to 1 and 1 to 0) of the corresponding positive number.

Range: $- (2^{n - 1} - 1)$ to $+ (2^{n - 1} - 1)$
Zero: Has two representations (0000 and 1111 in 4-bit).

Number Representation and Computer Arithmetic: Solved Questions with Step-by-Step Explanations (10 Problems)

Question 1 · Computer Organization and Architecture · 2026_Set2 NAT

The 32-bit IEEE 754 single precision representation of a number is 0xC2710000. The number in decimal representation is ________. <i>(rounded off to two decimal places)</i>

Correct Answer:

-60.25

Step-by-Step Solution

Key idea: Decode an IEEE 754 single-precision hexadecimal representation into its decimal equivalent by extracting the sign, exponent, and mantissa.

Step 1: Convert the hex value 0xC2710000 to binary.

C = 1100, 2 = 0010, 7 = 0111, 1 = 0001

Binary: 1100 0010 0111 0001 0000 0000 0000 0000

Step 2: Extract the fields.

Sign bit (1 bit): 1 (indicates a negative number).
Exponent field (8 bits): 10000100.
Mantissa field (23 bits): 11100010000000000000000.

Step 3: Decode the exponent.

Biased exponent = 10000100_2 = 132.

Actual exponent = 132 - 127 (bias) = 5.

Step 4: Decode the mantissa.

The implicit leading bit is 1, so the significand is 1.1110001_2.

Step 5: Calculate the decimal value.

Value = -1 × (1.1110001_2) × 2^5

Multiplying by 2^5 shifts the binary point 5 places to the right:

1.1110001_2 × 2^5 = 111100.01_2

Step 6: Convert binary to decimal.

Integer part: 111100_2 = 32 + 16 + 8 + 4 = 60.

Fractional part: .01_2 = 1/4 = 0.25.

Combined value = -60.25.

Question 2 · Computer Organization and Architecture · 2026_Set2 MSQ

In a system, numbers are represented using 4-bit two’s complement form. Consider four numbers $N_{1} = 1011$ , $N_{2} = 1101$ , $N_{3} = 1010$ and $N_{4} = 1001$ in the system. Which of the following operations will result in arithmetic overflow?

A.
$N_{1} + N_{2}$
B.
$N_{2} + N_{3}$
C.
$N_{3} - N_{4}$
D.
$N_{1} + N_{4}$

Correct Answer:

["B","D"]

Step-by-Step Solution

Key idea: This is a two's complement arithmetic overflow detection problem. Overflow occurs when adding two numbers of the same sign yields a result of the opposite sign, or when the carry into the sign bit differs from the carry out of the sign bit.

Step 1: Decode the 4-bit two's complement values.

Range for 4-bit two's complement is -8 to +7.

N1 = 1011 = -5

N2 = 1101 = -3

N3 = 1010 = -6

N4 = 1001 = -7

Step 2: Evaluate each operation.

N1 + N2 = -5 + (-3) = -8.

Binary: 1011 + 1101 = 11000 -> 1000 (-8).

Result is within range [-8, 7]. No overflow.

N2 + N3 = -3 + (-6) = -9.

Binary: 1101 + 1010 = 10111 -> 0111 (+7).

Result is +7, but true sum is -9. -9 is outside the range. Overflow occurs.

N3 - N4 = -6 - (-7) = +1.

Binary: 1010 + 0111 (2's comp of 1001) = 10001 -> 0001 (+1).

Result is within range. No overflow.

N1 + N4 = -5 + (-7) = -12.

Binary: 1011 + 1001 = 10100 -> 0100 (+4).

Result is +4, but true sum is -12. -12 is outside the range. Overflow occurs.

Answer: N2+N3 and N1+N4

Question 3 · Computer Organization and Architecture · 2026_Set1 MSQ

Consider the 8-bit signed integers

X

Y

and

Z

represented using the sign-magnitude form. The binary representations of

X

and

Y

are as follows:

X : 10110100 Y : 01001100

Which of the following operations to compute

Z

result(s) in an arithmetic overflow?

A.
$Z = X + Y$
B.
$Z = X - Y$
C.
$Z = - X + Y$
D.
$Z = - X - Y$

Correct Answer:

["B","C"]

Step-by-Step Solution

Key idea: Determine the decimal values of the given sign-magnitude numbers, perform the arithmetic operations, and check if the result falls within the valid range of 8-bit sign-magnitude representation.

Step 1: Decode X and Y from sign-magnitude form.

X = 10110100: Sign bit is 1 (negative). Magnitude is 0110100_2 = 32 + 16 + 4 = 52. So, X = -52.
Y = 01001100: Sign bit is 0 (positive). Magnitude is 1001100_2 = 64 + 8 + 4 = 76. So, Y = 76.

Step 2: Determine the valid range for 8-bit sign-magnitude.

The range is $- (2^{7} - 1)$ to $+ (2^{7} - 1)$ , which is -127 to +127.

Step 3: Evaluate each operation.

Option A: Z = X + Y = -52 + 76 = 24. This is within [-127, 127]. No overflow.
Option B: Z = X - Y = -52 - 76 = -128. This is less than -127. Overflow occurs.
Option C: Z = -X + Y = 52 + 76 = 128. This is greater than 127. Overflow occurs.
Option D: Z = -X - Y = 52 - 76 = -24. This is within [-127, 127]. No overflow.

Step 4: Conclude the correct options.

Operations B and C result in arithmetic overflow.

Question 4 · Computer Organization and Architecture · 2026_Set1 MCQ

Consider the real valued variables

X

Y

and

Z

represented using the IEEE 754 single-precision floating-point format. The binary representations of

X

and

Y

in hexadecimal notation are as follows:

X : 35 C 00000 Y : 34 A 00000

Let

Z = X + Y

.

Which one of the following is the binary representation of

Z

, in hexadecimal notation?

A.
35C80000
B.
35CC0000
C.
35E80000
D.
35EC0000

Correct Answer:

Step-by-Step Solution

Key idea: This is an IEEE 754 floating-point addition problem. You must decode the hexadecimal representations, align the exponents, add the significands, and re-encode the result.

Step 1: Decode X = 35C00000.

Binary: 0 01101011 10000000000000000000000

Sign = 0 (positive)

Exponent = 01101011 = 107. True exponent = 107 - 127 = -20.

Mantissa = 1.100... = 1.5.

X = +1.5 × 2^-20.

Step 2: Decode Y = 34A00000.

Binary: 0 01101001 01000000000000000000000

Sign = 0 (positive)

Exponent = 01101001 = 105. True exponent = 105 - 127 = -22.

Mantissa = 1.010... = 1.25.

Y = +1.25 × 2^-22.

Step 3: Align exponents for addition.

Shift Y's significand right by 2 to match X's exponent (-20):

Y = 1.25 × 2^-22 = 0.3125 × 2^-20.

In binary, 0.3125 = 0.0101.

Step 4: Add the significands.

1.1000 (X)

+ 0.0101 (Y aligned)

---------

1.1101

Step 5: Normalize and encode Z.

The sum 1.1101 × 2^-20 is already normalized.

True exponent = -20. Biased exponent = -20 + 127 = 107 = 01101011.

Mantissa = 11010000000000000000000.

Binary Z: 0 01101011 11101000000000000000000

Group by 4 bits: 0011 0101 1110 1000 0000 0000 0000 0000

Hex Z: 3 5 E 8 0 0 0 0.

Answer: 35E80000

Question 5 · Computer Organization and Architecture · 2025_Set2 MSQ

Three floating point numbers

X

Y

, and

Z

are stored in three registers RX, RY, and RZ, respectively in IEEE 754 single precision format as given below in hexadecimal:

RX = 0xC1100000, RY = 0x40C00000, and RZ = 0x41400000

Which of the following option(s) is/are CORRECT?

A.
$4 (X + Y) + Z = 0$
B.
$2 Y - Z = 0$
C.
$4 X + 3 Z = 0$
D.
$X + Y + Z = 0$

Correct Answer:

["A","B","C"]

Step-by-Step Solution

Key idea: This is an IEEE 754 hex decoding and arithmetic verification question, recognisable because it gives three hex-encoded floats and asks which algebraic relations hold. Step 1: Decode each register. RX = 0xC1100000: Binary

1100000100010 \dots 0

S = 1

E = 130

F = 001 \dots

. Exp

= 3

, sig

= 1.00 1_{2} = 1.125

X = - 1.125 \times 8 = - 9.0

. RY = 0x40C00000: Binary

0100000011000 \dots 0

S = 0

E = 129

F = 100 \dots

. Exp

= 2

, sig

= 1. 1_{2} = 1.5

Y = + 1.5 \times 4 = 6.0

. RZ = 0x41400000: Binary

0100000101000 \dots 0

S = 0

E = 130

F = 100 \dots

. Exp

= 3

, sig

= 1. 1_{2} = 1.5

Z = + 1.5 \times 8 = 12.0

. Step 2: Verify each option with

X = - 9, Y = 6, Z = 12

: - A:

4 (X + Y) + Z = 4 (- 3) + 12 = 0

. Correct. - B:

2 Y - Z = 12 - 12 = 0

. Correct. - C:

4 X + 3 Z = - 36 + 36 = 0

. Correct. - D:

X + Y + Z = - 9 + 6 + 12 = 9 \neq = 0

. Incorrect. Answer: Options A, B, C.

Question 6 · Computer Organization and Architecture · 2025_Set2 NAT

The following two signed 2’s complement numbers (multiplicand

M

and multiplier

Q

) are being multiplied using Booth’s algorithm:

M

: 1100 1101 1110 1101 and

Q

: 1010 0100 1010 1010

The total number of addition and subtraction operations to be performed is ___________. (Answer in integer)

Correct Answer:

Step-by-Step Solution

Key idea: This is a Booth's algorithm operation counting question, recognisable because it asks for the total number of addition and subtraction operations given a multiplier.

Step 1: The Booth decision rule: append $Q_{- 1} = 0$ to the right of $Q$ , then scan pairs $(Q_{i}, Q_{i - 1})$ . $(0, 1) \to$ add, $(1, 0) \to$ subtract, $(0, 0)$ or $(1, 1) \to$ no op.

Step 2: Write $Q$ with indices. $Q = 1010010010101010$ . Appending $Q_{- 1} = 0$ :

$15114013112011010190807160514031201100 - 1 0$

Step 3: Scan all 16 pairs from $i = 0$ to $i = 15$ :

$i = 0 : (0, 0)$ no, $i = 1 : (1, 0)$ sub, $i = 2 : (0, 1)$ add, $i = 3 : (1, 0)$ sub, $i = 4 : (0, 1)$ add, $i = 5 : (1, 0)$ sub, $i = 6 : (0, 1)$ add, $i = 7 : (1, 0)$ sub, $i = 8 : (0, 1)$ add, $i = 9 : (0, 0)$ no, $i = 10 : (1, 0)$ sub, $i = 11 : (0, 1)$ add, $i = 12 : (0, 0)$ no, $i = 13 : (1, 0)$ sub, $i = 14 : (0, 1)$ add, $i = 15 : (1, 0)$ sub.

Step 4: Count. Adds at $i = 2, 4, 6, 8, 11, 14$ : total $6$ . Subs at $i = 1, 3, 5, 7, 10, 13, 15$ : total $7$ .

Step 5: Total operations $= 6 + 7 = 13$ .

Answer: 13

Question 7 · Computer Organization and Architecture · 2025_Set1 MSQ

The number $- 6$ can be represented as 1010 in 4-bit 2’s complement representation. Which of the following is/are <b>CORRECT</b> 2’s complement representation(s) of $- 6$ ?

A.
1000 1010 in 8-bits
B.
1111 1010 in 8-bits
C.
1000 0000 0000 1010 in 16-bits
D.
1111 1111 1111 1010 in 16-bits

Correct Answer:

["B","D"]

Step-by-Step Solution

Key idea: This is a sign extension question in 2's complement, recognisable because a negative number is given in 4 bits and you must pick its correct wider representations.

Step 1: The sign extension rule for 2's complement says: replicate the MSB (sign bit) into all new higher-order bit positions.

Step 2: The 4-bit representation of $- 6$ is $1010$ . The MSB is $1$ .

Step 3: Extend to 8 bits by prepending four $1$ s: $11111010$ . This matches option B.

Step 4: Extend to 16 bits by prepending twelve $1$ s: $1111111111111010$ . This matches option D.

Step 5: Options A ( $10001010$ ) and C ( $1000000000001010$ ) pad with $0$ s instead of $1$ s. That is the sign-magnitude rule, not 2's complement. For example, $10001010$ in 8-bit 2's complement equals $- 128 + 8 + 2 = - 118$ , not $- 6$ .

Answer: Options B and D.

Question 8 · Computer Organization and Architecture · 2024_Set2 MCQ

The format of a single-precision floating-point number as per the IEEE 754 standard is:

Choose the largest floating-point number among the following options.

Correct Answer:

Step-by-Step Solution

Key idea: This is an IEEE 754 decoding and comparison problem. You must interpret the sign, exponent, and mantissa fields of each option to determine which represents the largest finite positive number.

Step 1: Recall the IEEE 754 single-precision format.

Sign (1 bit): 0 for positive, 1 for negative.
Exponent (8 bits): Biased by 127. Range 1 to 254 for normalized numbers. 255 is reserved for Infinity/NaN.
Mantissa (23 bits): Fractional part. Normalized numbers have an implicit leading 1.

Step 2: Analyze each option.

Option A: Sign=0, Exp=01111111 (127), Mantissa=all 1s.

Value = $+ (1.111...1)_{2} \times 2^{127 - 127} = + (1.111...1)_{2} \times 2^{0} \approx + 2$ .

Option B: Sign=0, Exp=11111110 (254), Mantissa=all 1s.

Value = $+ (1.111...1)_{2} \times 2^{254 - 127} = + (1.111...1)_{2} \times 2^{127}$ . This is the largest possible normalized positive number.

Option C: Sign=0, Exp=11111111 (255), Mantissa=all 1s.

Value = NaN (Not a Number), because the exponent is all 1s and the mantissa is non-zero. NaN is not a valid numerical value and cannot be "largest".

Option D: Sign=0, Exp=01111111 (127), Mantissa=all 0s.

Value = $+ (1.0)_{2} \times 2^{127 - 127} = + 1.0 \times 2^{0} = + 1$ .

Step 3: Compare the valid numerical values.

Option B ( $\approx 2^{128}$ ) is vastly larger than Option A ( $\approx 2$ ) and Option D ( $1$ ). Option C is NaN.

Answer: Option B

Question 9 · Computer Organization and Architecture · 2024_Set1 MCQ

Consider a system that uses 5 bits for representing signed integers in 2’s complement format. In this system, two integers $A$ and $B$ are represented as $A = 01010$ and $B = 11010$ . Which one of the following operations will result in either an arithmetic overflow or an arithmetic underflow?

A.
$A + B$
B.
$A - B$
C.
$B - A$
D.
$2 * B$

Correct Answer:

Step-by-Step Solution

Key idea: This is an overflow detection question in 2's complement, recognisable because it gives two signed numbers in a fixed bit-width and asks which operation overflows. Step 1: The 5-bit 2's complement range is

[- 2^{4}, 2^{4} - 1] = [- 16, + 15]

. Step 2: Decode the operands.

A = 01010

: MSB

= 0

, so

A = + 10

B = 11010

: MSB

= 1

, so negative. 2's complement of

11010

: invert

\to 00101

, add

1 \to 00110 = 6

. Thus

B = - 6

. Step 3: Evaluate each option against

[- 16, + 15]

: -

A + B = 10 + (- 6) = 4

. In range. No overflow. -

A - B = 10 - (- 6) = 16

. Exceeds

+ 15

. Overflow! -

B - A = - 6 - 10 = - 16

. Equals the minimum. In range. No overflow. -

2 \times B = - 12

. In range. No overflow. Step 4: Confirm

A - B

via hardware rule.

A + (- B) = 01010 + 00110 = 10000

. Carry into sign bit

= 1

, carry out

= 0

. They differ, confirming overflow. Answer: Option B.

Question 10 · Computer Organization and Architecture · 2023 MCQ

Consider the IEEE-754 single precision floating point numbers P=0xC1800000 and Q=0x3F5C2EF4.
Which one of the following corresponds to the product of these numbers (i.e., P × Q), represented in the IEEE-754 single precision format?

A.
1078734580
B.
1079783156
C.
3244044020
D.
3242995444

Correct Answer:

Step-by-Step Solution

Key idea: IEEE 754 single-precision multiplication can be simplified by analyzing the components (sign, exponent, mantissa) directly, especially when one operand is an exact power of 2.

Step 1: Decode P = 0xC1800000.

Binary: 1 10000011 00000000000000000000000

Sign = 1 (negative). Exponent = 131. Actual exponent = 131 - 127 = 4.

Mantissa = 1.0 (implicit leading 1, rest 0).

So, P = -1.0 × 2^4 = -16.

Step 2: Analyze Q = 0x3F5C2EF4.

Binary: 0 01111110 10111000010111011110100

Sign = 0 (positive). Exponent = 126. Actual exponent = 126 - 127 = -1.

Mantissa = 1.10111000010111011110100.

Step 3: Compute P × Q.

Multiplying by -16 is equivalent to multiplying by -2^4.

This flips the sign bit to 1, and adds 4 to the biased exponent of Q.

New biased exponent = 126 + 4 = 130.

130 in binary is 10000010.

The mantissa remains exactly the same because scaling by a power of 2 only shifts the binary point, without causing any carry into the implicit bit.

Step 4: Assemble the result.

Sign: 1

Exponent: 10000010

Mantissa: 10111000010111011110100

Combined binary: 1100 0001 0101 1100 0010 1110 1111 0100

Grouped into hex: C 1 5 C 2 E F 4.

Step 5: Convert 0xC15C2EF4 to decimal.

C15C2EF4 in hex = 3244044020 in decimal.

Answer: 3244044020

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Number Representation and Computer Arithmetic PYQs for GATE CS

Sign-Magnitude Representation

Sign-Magnitude Representation

1's Complement Representation

1's Complement Representation

Number Representation and Computer Arithmetic: Solved Questions with Step-by-Step Explanations (10 Problems)

Step-by-Step Solution

Step-by-Step Solution

Step-by-Step Solution

Step-by-Step Solution

Step-by-Step Solution

Step-by-Step Solution

Step-by-Step Solution

Step-by-Step Solution

Step-by-Step Solution

Step-by-Step Solution

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