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    Concurrency, Synchronization and Deadlocks Practice Questions for GATE CS

    Solve 0+ Concurrency, Synchronization and Deadlocks practice questions for GATE CS with answers and detailed solutions. Free sample questions below.

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    Concurrency, Synchronization and Deadlocks Practice Questions for GATE CS

    Solve 0+ Concurrency, Synchronization and Deadlocks practice questions for GATE CS with answers and detailed solutions. Free sample questions below.

    Atomic vs Non-Atomic Execution Boundaries

    Atomic vs Non-Atomic Execution Boundaries
    Concurrent execution means multiple threads share the CPU by taking turns. A context switch can happen at any moment. An operation is atomic if it executes completely without any possibility of interruption. For example, reading a single boolean flag is typically atomic. However, a statement like x = x + 1 is not atomic. It compiles to three machine instructions: load x into a register, increment the register, and store the register back to memory. If a context switch occurs after the load but before the store, another thread can read the old value of x, leading to lost updates.
    Explain this more simply
    Imagine two people writing in the same physical ledger. If you read the current balance, walk away to get a calculator, and return to write the new balance, someone else might have changed the balance while you were gone. Your calculation is now based on stale data. Atomicity means reading, calculating, and writing in one uninterrupted motion.
    Go one level deeper
    On modern architectures, even seemingly simple operations like x = y can be non-atomic if the variables are not naturally aligned in memory or exceed the processor word size. True atomicity requires hardware support, such as atomic instructions or memory barriers, which this topic assumes are absent unless explicitly stated.

    Decomposing High-Level Statements into Machine Steps

    To analyze concurrent outcomes accurately, we must decompose high-level statements into their constituent machine-level steps. Consider the statement a = a + 1. This is not a single event.

    A context switch can occur after any of these three steps. When multiple threads execute similar statements, the interleaving of these granular steps determines the final state.

    1. Load: Read the current value of a from memory into a local register (e.g., R1 = a).
    2. Modify: Perform the arithmetic operation on the register (e.g., R1 = R1 + 1).
    3. Store: Write the new value from the register back to memory (e.g., a = R1).
    Explain this more simply

    Think of the register as a temporary scratchpad. Thread 1 writes a number on its scratchpad, but before it can copy that number to the main whiteboard, the teacher calls Thread 2. Thread 2 looks at the whiteboard, sees the old number, and does its own math. The scratchpad of Thread 1 is isolated and does not affect Thread 2 until the store step happens.

    Go one level deeper

    In compiler optimization, a variable might be kept in a register across multiple statements. However, for exam-level interleaving analysis, we assume the standard naive compilation where each high-level statement independently performs its own load, modify, and store sequence unless specified otherwise.

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