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    Number Representation and Computer Arithmetic Notes for GATE CS

    Number Representation and Computer Arithmetic notes for GATE CS: 45 study cards covering concepts, formulas, shortcuts and exam traps, plus solved practice qu

    number representation and computer arithmetic notes

    Sign-Magnitude Representation

    Sign-Magnitude Representation

    In Sign-Magnitude representation, the Most Significant Bit (MSB) is dedicated to the sign, while the remaining bits represent the magnitude.

    1 Sign Bit
    0 1 1 Magnitude
    • Sign Bit: 0 for positive, 1 for negative.
    • Range: to
    • Zero: Has two representations (+0 and -0).
    Example (4-bit):
    +3 = 0011
    -3 = 1011

    1's Complement Representation

    1's Complement Representation

    In 1's Complement representation, positive numbers are represented as in Sign-Magnitude. Negative numbers are obtained by inverting all bits (changing 0 to 1 and 1 to 0) of the corresponding positive number.

    0 1 0 1 (+5)
    ↓ Invert
    1 0 1 0 (-5)
    • Range: to
    • Zero: Has two representations (0000 and 1111 in 4-bit).

    2's Complement Representation

    2's Complement Representation

    2's Complement is the universal standard for signed integer representation in modern computers. A negative number is formed by taking the 1's complement and adding 1 to the Least Significant Bit (LSB).

    0 1 1 0 (+6)
    ↓ 1's Comp
    1 0 0 1
    ↓ Add 1
    1 0 1 0 (-6)
    • Range: to
    • Zero: Exactly one unique representation (00...0).

    42 more cards in this chapter

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    Question 1
    Level 1: Warm-up

    What is the maximum positive integer that can be represented in a 12-bit 2's complement system?

    Question 2
    Level 1: Warm-up

    In an 11-bit 2's complement system, what is the maximum absolute value of a negative integer that can be represented?

    Question 3
    Level 1: Warm-up

    A 12-bit multiplier is used in Booth's algorithm. A student incorrectly counts the number of addition/subtraction operations by counting the number of 1s in the multiplier and gets 7.

    What is the CORRECT number of operations using Booth's algorithm?

    Question 4
    Level 1: Warm-up

    What is the exact decimal value of the IEEE 754 single-precision hex number 41000000?

    Question 5
    Level 1: Warm-up

    What is the exact decimal value of the IEEE 754 single-precision hex number C3400000?

    Question 6
    Level 1: Warm-up

    In the step-by-step floating-point multiplication method for IEEE 754, what is the exact constant value that must be subtracted from the sum of the two stored exponents to correct the double-counted bias?

    Question 7
    Level 1: Warm-up

    Consider the following two statements regarding IEEE 754 single-precision floating-point multiplication:

    <b>Assertion (A):</b> If two numbers have stored exponents and , the stored exponent of their product is 133.

    <b>Reason (R):</b> The stored exponent of the product is obtained by adding the stored exponents of the operands and subtracting 254.

    Which of the following is correct?

    Question 8
    Level 1: Warm-up

    Consider the following 8-bit multipliers used in Booth's algorithm:

    (P)

    (Q)

    (R)

    (S)

    Which multiplier will require the MAXIMUM number of addition/subtraction operations?

    Question 9
    Level 1: Warm-up

    Assertion (A): The exponent bias in IEEE 754 single-precision format is 127.

    Reason (R): This bias allows the exponent field to represent both positive and negative powers of 2 using an unsigned integer representation.

    Question 10
    Level 1: Warm-up

    In the IEEE 754 single-precision decoding formula , what is the minimum possible value of the true exponent for a normalized number?

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    Number Representation and Computer Arithmetic Notes for GATE CS

    Number Representation and Computer Arithmetic notes for GATE CS: 45 study cards covering concepts, formulas, shortcuts and exam traps, plus solved practice questions.

    Sign-Magnitude Representation

    Sign-Magnitude Representation

    In Sign-Magnitude representation, the Most Significant Bit (MSB) is dedicated to the sign, while the remaining bits represent the magnitude.

    1 Sign Bit
    0 1 1 Magnitude
    • Sign Bit: 0 for positive, 1 for negative.
    • Range: to
    • Zero: Has two representations (+0 and -0).
    Example (4-bit):
    +3 = 0011
    -3 = 1011

    1's Complement Representation

    1's Complement Representation

    In 1's Complement representation, positive numbers are represented as in Sign-Magnitude. Negative numbers are obtained by inverting all bits (changing 0 to 1 and 1 to 0) of the corresponding positive number.

    0 1 0 1 (+5)
    ↓ Invert
    1 0 1 0 (-5)
    • Range: to
    • Zero: Has two representations (0000 and 1111 in 4-bit).

    2's Complement Representation

    2's Complement Representation

    2's Complement is the universal standard for signed integer representation in modern computers. A negative number is formed by taking the 1's complement and adding 1 to the Least Significant Bit (LSB).

    0 1 1 0 (+6)
    ↓ 1's Comp
    1 0 0 1
    ↓ Add 1
    1 0 1 0 (-6)
    • Range: to
    • Zero: Exactly one unique representation (00...0).

    2's Complement Range Asymmetry

    2's Complement Range Asymmetry

    The range of 2's complement is asymmetric because there is one more negative number than positive numbers.

    Max Positive (8-bit)
    +127
    01111111
    Min Negative (8-bit)
    -128
    10000000
    • For bits, the most negative number is .
    • The most positive number is .
    • The value -128 has no positive counterpart (+128 requires 9 bits). Taking the 2's complement of 10000000 yields 10000000 again.

    Number Representation and Computer Arithmetic: Solved Questions with Step-by-Step Explanations (10 Problems)

    Question 1 · Computer Organization and Architecture MCQ

    What is the maximum positive integer that can be represented in a 12-bit 2's complement system?

    1. A.

      2048

    2. B.

      4095

    3. C.

      4096

    4. D.

      2047

    Correct Answer:

    D

    Step-by-Step Solution

    Key idea: In 2's complement, the range is asymmetric. The maximum positive value uses all bits except the sign bit.

    Step 1: Recall the formula for the maximum positive value in -bit 2's complement.

    Maximum positive value =

    Step 2: Substitute .

    Maximum positive value =

    Step 3: Calculate .

    Step 4: Subtract 1.

    Answer: (Option D)

    Question 2 · Computer Organization and Architecture MCQ

    In an 11-bit 2's complement system, what is the maximum absolute value of a negative integer that can be represented?

    1. A.

      1023

    2. B.

      1024

    3. C.

      2048

    4. D.

      2047

    Correct Answer:

    B

    Step-by-Step Solution

    Key idea: In 2's complement, the range is asymmetric. The minimum negative value is , which has the largest absolute value.

    Step 1: Recall the formula for the minimum value in -bit 2's complement.

    Minimum value =

    Step 2: Substitute .

    Minimum value =

    Step 3: Calculate .

    Step 4: Find the absolute value.

    Answer: (Option B)

    Question 3 · Computer Organization and Architecture MCQ

    A 12-bit multiplier is used in Booth's algorithm. A student incorrectly counts the number of addition/subtraction operations by counting the number of 1s in the multiplier and gets 7.

    What is the CORRECT number of operations using Booth's algorithm?

    1. A.

      7

    2. B.

      8

    3. C.

      9

    4. D.

      10

    Correct Answer:

    C

    Step-by-Step Solution

    Key idea: Booth's algorithm counts bit transitions, not the number of 1s.

    Step 1: Write the multiplier with appended 0:

    With :

    Step 2: Count transitions from right to left:

    • Position 0→1: (transition 1)
    • Position 1→2: (transition 2)
    • Position 2→3: (transition 3)
    • Position 3→4: (transition 4)
    • Position 4→5: (transition 5)
    • Position 5→6: (no transition)
    • Position 6→7: (transition 6)
    • Position 7→8: (no transition)
    • Position 8→9: (transition 7)
    • Position 9→10: (no transition)
    • Position 10→11: (transition 8)
    • Position 11→12: (transition 9)

    Step 3: Total transitions = 9

    The student's count of 7 (number of 1s) is incorrect. The correct count is 9.

    Answer: C

    Question 4 · Computer Organization and Architecture MCQ

    What is the exact decimal value of the IEEE 754 single-precision hex number 41000000?

    1. A.

      4.0

    2. B.

      8.0

    3. C.

      16.0

    4. D.

      2.0

    Correct Answer:

    B

    Step-by-Step Solution

    Key idea: This is a quick decoding comparison question. You must accurately extract the exponent and apply the bias without off-by-one errors.

    Step 1: Convert 41000000 to binary: 0100 0001 0000 0000 ...

    Step 2: Extract the sign bit: 0 (Positive).

    Step 3: Extract the 8-bit exponent: 10000010. In decimal, this is .

    Step 4: Calculate the true exponent: .

    Step 5: Extract the fraction: 000...0. The significand is .

    Step 6: Calculate the final value: .

    Answer: 8.0 (Option B).

    Question 5 · Computer Organization and Architecture MCQ

    What is the exact decimal value of the IEEE 754 single-precision hex number C3400000?

    1. A.

      -192.0

    2. B.

      -96.0

    3. C.

      -384.0

    4. D.

      -128.0

    Correct Answer:

    A

    Step-by-Step Solution

    Key idea: This is a quick decoding comparison question. You must accurately extract the exponent and apply the bias without off-by-one errors.

    Step 1: Convert C3400000 to binary: 1100 0011 0100 0000 ...

    Step 2: Extract the sign bit: 1 (Negative).

    Step 3: Extract the 8-bit exponent: 10000110. In decimal, this is .

    Step 4: Calculate the true exponent: .

    Step 5: Extract the fraction: 100...0. The fractional part is . The significand is .

    Step 6: Calculate the final value: .

    Answer: -192.0 (Option A).

    Question 6 · Computer Organization and Architecture MCQ

    In the step-by-step floating-point multiplication method for IEEE 754, what is the exact constant value that must be subtracted from the sum of the two stored exponents to correct the double-counted bias?

    1. A.

    2. B.

    3. C.

    4. D.

    Correct Answer:

    C

    Step-by-Step Solution

    Key idea: This is a direct recall question about the bias correction in floating-point multiplication. You must know the exact bias value for single precision.

    Step 1: Recall that the stored exponent is related to the true exponent by .

    Step 2: For IEEE 754 single precision, the bias is exactly 127.

    Step 3: When multiplying, the true exponents add: .

    Step 4: Substituting the stored exponents: .

    Step 5: To get the new stored exponent , we add 127 back: .

    Step 6: The constant subtracted is exactly 127.

    Answer: 127 (Option C).

    Question 7 · Computer Organization and Architecture MCQ

    Consider the following two statements regarding IEEE 754 single-precision floating-point multiplication:

    <b>Assertion (A):</b> If two numbers have stored exponents and , the stored exponent of their product is 133.

    <b>Reason (R):</b> The stored exponent of the product is obtained by adding the stored exponents of the operands and subtracting 254.

    Which of the following is correct?

    1. A.

      Both A and R are true and R is the correct explanation of A.

    2. B.

      Both A and R are true but R is NOT the correct explanation of A.

    3. C.

      A is true but R is false.

    4. D.

      A is false but R is true.

    Correct Answer:

    C

    Step-by-Step Solution

    Key idea: In floating-point multiplication, the stored exponents are added and the bias (127) is subtracted once.

    Step 1: Evaluate Assertion (A). . Assertion A is true.

    Step 2: Evaluate Reason (R). The formula states we subtract 127, not 254. Reason R is false.

    Answer: A is true but R is false.

    Question 8 · Computer Organization and Architecture MCQ

    Consider the following 8-bit multipliers used in Booth's algorithm:

    (P)

    (Q)

    (R)

    (S)

    Which multiplier will require the MAXIMUM number of addition/subtraction operations?

    1. A.

      P

    2. B.

      Q

    3. C.

      R

    4. D.

      S

    Correct Answer:

    A

    Step-by-Step Solution

    Key idea: In Booth's algorithm, the number of operations equals the number of bit transitions in the multiplier (with an appended 0).

    Step 1: For each multiplier, append 0 and count transitions (right to left):

    (P) →

    Transitions: = 8 transitions

    (Q) →

    Transitions: = 7 transitions

    (R) →

    Transitions: = 2 transitions

    (S) →

    Transitions: = 1 transition

    Step 2: Compare counts:

    • P: 8 operations
    • Q: 7 operations
    • R: 2 operations
    • S: 1 operation

    Maximum is P with 8 operations.

    Answer: A

    Question 9 · Computer Organization and Architecture MCQ

    Assertion (A): The exponent bias in IEEE 754 single-precision format is 127.

    Reason (R): This bias allows the exponent field to represent both positive and negative powers of 2 using an unsigned integer representation.

    1. A.

      Both A and R are true, and R is the correct explanation of A.

    2. B.

      Both A and R are true, but R is NOT the correct explanation of A.

    3. C.

      A is true, but R is false.

    4. D.

      A is false, but R is true.

    Correct Answer:

    A

    Step-by-Step Solution

    Insight: The bias is a constant added to the true exponent to allow unsigned storage of signed values.

    Exam route: Verify A: Single-precision bias is indeed 127. Verify R: The purpose of the bias is to allow the 8-bit exponent field to be treated as an unsigned integer while representing negative, zero, and positive true exponents. R correctly explains A.

    Learning route:

    Step 1: Evaluate Assertion (A). The formula for the biased exponent is , where is the true exponent. Thus, the bias is 127. (A is true).

    Step 2: Evaluate Reason (R). The 8-bit exponent field is stored as an unsigned integer (range 0 to 255). By adding 127, a true exponent of -127 becomes 0, and +128 becomes 255. This allows the hardware to compare exponents using simple unsigned integer comparison. (R is true).

    Step 3: Check the link. R explains why the specific value 127 is used as the bias for an 8-bit field.

    Answer: A

    Question 10 · Computer Organization and Architecture MCQ

    In the IEEE 754 single-precision decoding formula , what is the minimum possible value of the true exponent for a normalized number?

    1. A.

      -127

    2. B.

      0

    3. C.

      1

    4. D.

      -126

    Correct Answer:

    D

    Step-by-Step Solution

    Key idea: For normalized numbers, the stored exponent ranges from 1 to 254.

    Exam route: Minimum for normalized is 1. True exponent = .

    Learning route:

    Step 1: Identify the condition: normalized number.

    Step 2: Recall that is reserved for zero and denormalized numbers, and is reserved for Infinity and NaN.

    Step 3: Therefore, the minimum valid for a normalized number is 1.

    Step 4: Calculate true exponent: .

    Answer: D

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