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    Concurrency, Synchronization and Deadlocks Notes for GATE CS

    Concurrency, Synchronization and Deadlocks notes for GATE CS: 45 study cards covering concepts, formulas, shortcuts and exam traps, plus solved practice quest

    concurrency synchronization and deadlocks notes

    Atomic vs Non-Atomic Execution Boundaries

    Atomic vs Non-Atomic Execution Boundaries
    Concurrent execution means multiple threads share the CPU by taking turns. A context switch can happen at any moment. An operation is atomic if it executes completely without any possibility of interruption. For example, reading a single boolean flag is typically atomic. However, a statement like x = x + 1 is not atomic. It compiles to three machine instructions: load x into a register, increment the register, and store the register back to memory. If a context switch occurs after the load but before the store, another thread can read the old value of x, leading to lost updates.
    Explain this more simply
    Imagine two people writing in the same physical ledger. If you read the current balance, walk away to get a calculator, and return to write the new balance, someone else might have changed the balance while you were gone. Your calculation is now based on stale data. Atomicity means reading, calculating, and writing in one uninterrupted motion.
    Go one level deeper
    On modern architectures, even seemingly simple operations like x = y can be non-atomic if the variables are not naturally aligned in memory or exceed the processor word size. True atomicity requires hardware support, such as atomic instructions or memory barriers, which this topic assumes are absent unless explicitly stated.

    Decomposing High-Level Statements into Machine Steps

    To analyze concurrent outcomes accurately, we must decompose high-level statements into their constituent machine-level steps. Consider the statement a = a + 1. This is not a single event.

    A context switch can occur after any of these three steps. When multiple threads execute similar statements, the interleaving of these granular steps determines the final state.

    1. Load: Read the current value of a from memory into a local register (e.g., R1 = a).
    2. Modify: Perform the arithmetic operation on the register (e.g., R1 = R1 + 1).
    3. Store: Write the new value from the register back to memory (e.g., a = R1).
    Explain this more simply

    Think of the register as a temporary scratchpad. Thread 1 writes a number on its scratchpad, but before it can copy that number to the main whiteboard, the teacher calls Thread 2. Thread 2 looks at the whiteboard, sees the old number, and does its own math. The scratchpad of Thread 1 is isolated and does not affect Thread 2 until the store step happens.

    Go one level deeper

    In compiler optimization, a variable might be kept in a register across multiple statements. However, for exam-level interleaving analysis, we assume the standard naive compilation where each high-level statement independently performs its own load, modify, and store sequence unless specified otherwise.

    Enumerating Outcomes for Two Atomic Statements

    Two threads, T1 and T2, concurrently execute operations on shared integers a and b, initially a = 1, b = 1.

    T1 executes:
    S1: a = a + 1
    S2: b = b * 2

    T2 executes:
    S3: b = b + 1
    S4: a = a * 2

    Assume each statement (S1 to S4) is executed atomically without interruption. List all possible combinations of final values for (a, b).

    I will just run T1 completely, then run T2 completely, and maybe run T2 then T1. That gives me two outcomes.

    This instinct misses the interleaved executions where T1 and T2 alternate. The stem states context switching can happen at any time, meaning S1 can be followed by S3, then S2, then S4. Restricting to only sequential thread execution ignores valid interleavings and loses marks.

    We must preserve the internal order of each thread: S1 must precede S2, and S3 must precede S4. The valid interleavings of four statements with these constraints are:

    1. S1, S2, S3, S4: S1 makes a=2. S2 makes b=2. S3 makes b=3. S4 makes a=4. Final state: (a=4, b=3).
    2. S1, S3, S2, S4: S1 makes a=2. S3 makes b=2. S2 makes b=4. S4 makes a=4. Final state: (a=4, b=4).
    3. S1, S3, S4, S2: S1 makes a=2. S3 makes b=2. S4 makes a=4. S2 makes b=4. Final state: (a=4, b=4).
    4. S3, S4, S1, S2: S3 makes b=2. S4 makes a=2. S1 makes a=3. S2 makes b=4. Final state: (a=3, b=4).
    5. S3, S1, S4, S2: S3 makes b=2. S1 makes a=2. S4 makes a=4. S2 makes b=4. Final state: (a=4, b=4).
    6. S3, S1, S2, S4: S3 makes b=2. S1 makes a=2. S2 makes b=4. S4 makes a=4. Final state: (a=4, b=4).

    Verification: The unique final states are (a=4, b=3), (a=4, b=4), and (a=3, b=4). You can now systematically enumerate outcomes by respecting intra-thread ordering.

    Go one level deeper

    Notice that (a=3, b=3) is impossible. To get a=3, S1 must happen after S4 (so a goes 1 to 2 to 3), but to get b=3, S3 must happen after S2 (so b goes 1 to 2 to 3). This requires S4 before S1 and S2 before S3, which contradicts the required internal order S1 before S2 and S3 before S4.

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    Concurrency, Synchronization and Deadlocks Notes for GATE CS

    Concurrency, Synchronization and Deadlocks notes for GATE CS: 45 study cards covering concepts, formulas, shortcuts and exam traps, plus solved practice questions.

    Atomic vs Non-Atomic Execution Boundaries

    Atomic vs Non-Atomic Execution Boundaries
    Concurrent execution means multiple threads share the CPU by taking turns. A context switch can happen at any moment. An operation is atomic if it executes completely without any possibility of interruption. For example, reading a single boolean flag is typically atomic. However, a statement like x = x + 1 is not atomic. It compiles to three machine instructions: load x into a register, increment the register, and store the register back to memory. If a context switch occurs after the load but before the store, another thread can read the old value of x, leading to lost updates.
    Explain this more simply
    Imagine two people writing in the same physical ledger. If you read the current balance, walk away to get a calculator, and return to write the new balance, someone else might have changed the balance while you were gone. Your calculation is now based on stale data. Atomicity means reading, calculating, and writing in one uninterrupted motion.
    Go one level deeper
    On modern architectures, even seemingly simple operations like x = y can be non-atomic if the variables are not naturally aligned in memory or exceed the processor word size. True atomicity requires hardware support, such as atomic instructions or memory barriers, which this topic assumes are absent unless explicitly stated.

    Decomposing High-Level Statements into Machine Steps

    To analyze concurrent outcomes accurately, we must decompose high-level statements into their constituent machine-level steps. Consider the statement a = a + 1. This is not a single event.

    A context switch can occur after any of these three steps. When multiple threads execute similar statements, the interleaving of these granular steps determines the final state.

    1. Load: Read the current value of a from memory into a local register (e.g., R1 = a).
    2. Modify: Perform the arithmetic operation on the register (e.g., R1 = R1 + 1).
    3. Store: Write the new value from the register back to memory (e.g., a = R1).
    Explain this more simply

    Think of the register as a temporary scratchpad. Thread 1 writes a number on its scratchpad, but before it can copy that number to the main whiteboard, the teacher calls Thread 2. Thread 2 looks at the whiteboard, sees the old number, and does its own math. The scratchpad of Thread 1 is isolated and does not affect Thread 2 until the store step happens.

    Go one level deeper

    In compiler optimization, a variable might be kept in a register across multiple statements. However, for exam-level interleaving analysis, we assume the standard naive compilation where each high-level statement independently performs its own load, modify, and store sequence unless specified otherwise.

    Enumerating Outcomes for Two Atomic Statements

    Two threads, T1 and T2, concurrently execute operations on shared integers a and b, initially a = 1, b = 1.

    T1 executes:
    S1: a = a + 1
    S2: b = b * 2

    T2 executes:
    S3: b = b + 1
    S4: a = a * 2

    Assume each statement (S1 to S4) is executed atomically without interruption. List all possible combinations of final values for (a, b).

    I will just run T1 completely, then run T2 completely, and maybe run T2 then T1. That gives me two outcomes.

    This instinct misses the interleaved executions where T1 and T2 alternate. The stem states context switching can happen at any time, meaning S1 can be followed by S3, then S2, then S4. Restricting to only sequential thread execution ignores valid interleavings and loses marks.

    We must preserve the internal order of each thread: S1 must precede S2, and S3 must precede S4. The valid interleavings of four statements with these constraints are:

    1. S1, S2, S3, S4: S1 makes a=2. S2 makes b=2. S3 makes b=3. S4 makes a=4. Final state: (a=4, b=3).
    2. S1, S3, S2, S4: S1 makes a=2. S3 makes b=2. S2 makes b=4. S4 makes a=4. Final state: (a=4, b=4).
    3. S1, S3, S4, S2: S1 makes a=2. S3 makes b=2. S4 makes a=4. S2 makes b=4. Final state: (a=4, b=4).
    4. S3, S4, S1, S2: S3 makes b=2. S4 makes a=2. S1 makes a=3. S2 makes b=4. Final state: (a=3, b=4).
    5. S3, S1, S4, S2: S3 makes b=2. S1 makes a=2. S4 makes a=4. S2 makes b=4. Final state: (a=4, b=4).
    6. S3, S1, S2, S4: S3 makes b=2. S1 makes a=2. S2 makes b=4. S4 makes a=4. Final state: (a=4, b=4).

    Verification: The unique final states are (a=4, b=3), (a=4, b=4), and (a=3, b=4). You can now systematically enumerate outcomes by respecting intra-thread ordering.

    Go one level deeper

    Notice that (a=3, b=3) is impossible. To get a=3, S1 must happen after S4 (so a goes 1 to 2 to 3), but to get b=3, S3 must happen after S2 (so b goes 1 to 2 to 3). This requires S4 before S1 and S2 before S3, which contradicts the required internal order S1 before S2 and S3 before S4.

    Practice: Predicting Final States of Shared Variables

    MCQ 150s
    Consider two threads T1 and T2 updating shared variables x and y, initially x = 1, y = 1. Each statement is executed atomically.

    T1:
    x = x + 1
    y = y * 2

    T2:
    y = y + 1
    x = x * 2

    Which of the following options lists all possible combinations of values of x and y after both threads finish?
    Full Solution

    Recognition trigger: "lists all possible combinations" with atomic statements signals systematic interleaving enumeration.

    Let T1 statements be S1 (x=x+1), S2 (y=y*2). Let T2 statements be S3 (y=y+1), S4 (x=x*2).

    Valid interleavings preserving S1->S2 and S3->S4:

    1. S1, S2, S3, S4: S1 makes x=2. S2 makes y=2. S3 makes y=3. S4 makes x=4. Final: (4, 3).
    2. S1, S3, S2, S4: S1 makes x=2. S3 makes y=2. S2 makes y=4. S4 makes x=4. Final: (4, 4).
    3. S1, S3, S4, S2: S1 makes x=2. S3 makes y=2. S4 makes x=4. S2 makes y=4. Final: (4, 4).
    4. S3, S4, S1, S2: S3 makes y=2. S4 makes x=2. S1 makes x=3. S2 makes y=4. Final: (3, 4).
    5. S3, S1, S4, S2: S3 makes y=2. S1 makes x=2. S4 makes x=4. S2 makes y=4. Final: (4, 4).
    6. S3, S1, S2, S4: S3 makes y=2. S1 makes x=2. S2 makes y=4. S4 makes x=4. Final: (4, 4).

    Unique final states are (4, 4), (3, 4), and (4, 3).

    Go one level deeper

    Notice that (3,3) is impossible. Achieving it requires S4 to precede S1 (to make x=2 for S1 to read) and S2 to precede S3 (to make y=2 for S3 to read). This directly contradicts the program order S1->S2 and S3->S4, forming a logical cycle.

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